1. Field
The present invention relates to a semiconductor storage device. In particular, the present invention is more suitably applied to a method of preventing corruption of data stored in a memory cell at the time of data writing and data readout even when a static noise margin in a static random access memory (SRAM) is small.
2. Description of the Related Art
A static random access memory (SRAM) is widely used as a computer cache memory and a mobile electronic product because the SRAM need not be refreshed and thereby consumes less power and operates at faster speed than a dynamic random access memory (DRAM). A memory cell used in such an SRAM can be a high-resistance cell and a complementary metal-oxide semiconductor (CMOS) cell. The CMOS cell is formed of six transistors, that is, a pair of transfer transistors, a pair of drive transistors, and a pair of load transistors.
Furthermore, there has been proposed a method for forming a memory cell of an SRAM by using ten transistors to increase a noise margin without lowering write performance, which is disclosed in, for example, Japanese Patent Application Laid-open No. H10-27476. In this memory cell, a combination of a first pass transistor and a first bit-line selection transistor that are connected in series is connected between an output node of a first inverter and a first bit line, a first write pass transistor is connected to the first pass transistor in parallel to each other, a combination of a second pass transistor and a second bit-line selection transistor that are connected in series is connected between an output node of a second inverter and a second bit line, and a second write pass transistor is connected to the second pass transistor in parallel to each other.
However, in the method of forming an SRAM by using six transistors, a transfer transistor in a non-selected cell that is connected to a word line on the same row as the selected cell is also turned on when data writing and data readout are performed. Therefore, when a static noise margin of the SRAM is small, write disturb and read disturb may occur, leading to corruption of data in the non-selected cell.
Furthermore, in the method disclosed in Japanese Patent Application Laid-open No. H10-27476, a bit line for writing data is shared as a bit line for reading data, so that read disturb may occur at the time of data readout, leading to corruption of data in the selected cell.